Jerimy Nelson
24Patents
10h-index
9Co-inventors
57Inventor score
Filing activity: Jul 19, 2002 → Jun 5, 2006
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6769102B2 | Verifying proximity of ground metal to signal traces in an integrated circuit | Physics | 32 | Expired |
| US6983434B1 | Differential via pair impedance adjustment tool | Electricity | 26 | Expired |
| US6859915B1 | Signal line impedance verification tool | Electricity | 14 | Expired |
| US6845492B1 | Signal via impedance adjustment tool | Electricity | 13 | Expired |
| US7117464B2 | System and method for evaluating signal coupling between differential traces in a package design | Physics | 11 | Expired |
| US6971077B1 | Signal line impedance adjustment tool | Electricity | 11 | Expired |
| US6976233B1 | Signal via impedance verification tool | Physics | 11 | Expired |
| US6889367B1 | Differential via pair impedance verification tool | Electricity | 11 | Expired |
| US6907589B2 | System and method for evaluating vias per pad in a package design | Physics | 10 | Expired |
| US7075185B2 | Routing vias in a substrate from bypass capacitor pads | Electricity | 10 | Expired |
| US7078812B2 | Routing differential signal lines in a substrate | Electricity | 8 | Expired |
| US6922822B2 | Verifying proximity of ground vias to signal vias in an integrated circuit | Physics | 8 | Expired |
| US6938230B2 | System and method for evaluating signal trace discontinuities in a package design | Physics | 7 | Expired |
| US6968522B1 | Differential line pair impedance verification tool | Physics | 7 | Expired |
| US7069095B2 | System and method for populating a computer-aided design program's database with design parameters | Physics | 6 | Expired |
| US6807657B2 | Inter-signal proximity verification in an integrated circuit | Physics | 5 | Expired |
| US6983433B1 | Differential line pair impedance adjustment tool | Physics | 4 | Expired |
| US7272806B2 | System and method for evaluating power and ground vias in a package design | Physics | 3 | Expired |
| US7143022B1 | System and method for integrating subcircuit models in an integrated power grid analysis environment | Emerging Cross-Sectional Technologies | 3 | Expired |
| US7327583B2 | Routing power and ground vias in a substrate | Electricity | 2 | Expired |
| US7137088B2 | System and method for determining signal coupling coefficients for lines | Physics | 1 | Expired |
| US7143389B2 | Systems and methods for generating node level bypass capacitor models | Physics | 1 | Expired |
| US7055124B2 | System and method for evaluating signal deviations in a package design | Physics | 1 | Expired |
| US7326860B2 | Routing vias in a substrate from bypass capacitor pads | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.