Wafer-level seal for non-silicon-based devices
US6846423B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 28, 2002 |
| Grant date | Jan 25, 2005 |
| Priority date | — |
| Expiry date | Feb 20, 2023 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49126
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
One embodiment disclosed relates to a method for sealing an active area of a non-silicon-based device on a wafer. The method includes providing a sacrificial material over at least the active area of the non-silicon-based device, depositing a seal coating over the wafer so that the seal coating covers the sacrificial material, and replacing the sacrificial material with a target atmosphere. Another embodiment disclosed relates to a non-silicon-based device sealed at the wafer level (i.e. prior to separation of the die from the wafer). The device includes an active area to be protected, a contact area, and a lithographically-formed structure sealing at least the active area and leaving at least a portion of the contact area exposed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.