Dual gate oxide high-voltage semiconductor device
US6847081B2 · kind B2 · utility
2Cited by
18References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 10, 2001 |
| Grant date | Jan 25, 2005 |
| Priority date | — |
| Expiry date | Dec 10, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/516
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A dual gate oxide high-voltage semiconductor device and method for forming the same are provided. Specifically, a device formed according to the present invention includes a semiconductor substrate, a buried oxide layer formed over the substrate, a silicon layer formed over the buried oxide layer, and a top oxide layer formed over the silicon layer. Adjacent an edge of the top oxide layer, a dual gate oxide is formed. The dual gate oxide allows both specific-on-resistance and breakdown voltage of the device to be optimized.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.