Frequency-stabilized transceiver configuration
US6847812B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 23, 2001 |
| Grant date | Jan 25, 2005 |
| Priority date | — |
| Expiry date | Jan 5, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03D3/007
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A transceiver configuration has an integrated circuit (IC) with an A/D and/or D/A converter, a VCO with a reference oscillator, which provides a sampling clock for the A/D and/or D/A converter, and a digital data processing circuit. The IC is connected to a radio-frequency section, the frequency converter stage of which is operated with a beat frequency derived from the controllable oscillator frequency foz. A capacitive resonant element of the reference oscillator is disposed outside of the IC.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.