Method and apparatus for detecting devices that can latchup
US6848089B2 · kind B2 · utility
3Cited by
13References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 31, 2002 |
| Grant date | Jan 25, 2005 |
| Priority date | — |
| Expiry date | Jul 31, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/398
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparratus for for identifying circuits within an integrated circuit design that are likely to latchup. The present invention accomplishes the identification by searching for suspect circuits and then modifying these circuits to represent a device known by an EDA tool (e.g. FET device). The EDA tool can then be used to determine the likelihood of latchup occuring based upon the modified device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.