Integrated circuit die and an electronic assembly having a three-dimensional interconnection scheme
US6848177B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 28, 2002 |
| Grant date | Feb 1, 2005 |
| Priority date | — |
| Expiry date | Mar 28, 2022 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49165
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An electronic assembly is assembled by stacking two or more integrated circuit dies on top of one another. Prior to singulation, an opening is laser-drilled into an upper die, and subsequently filled with a conductive member. The conductive member is located on a lower die and interconnects integrated circuits of the upper and lower dies. Laser-drilling allows for faster throughput when compared to, for example, etching, especially if a small number of openings has to be formed. The opening is laser-drilled from an upper surface of the upper die all the way through the die, which allows for the use of alignment marks on an upper surface of the upper die.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.