System and method for using film deposition techniques to provide an antenna within an integrated circuit package
US6849936B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 25, 2002 |
| Grant date | Feb 1, 2005 |
| Priority date | — |
| Expiry date | Sep 25, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/16152
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
An integrated circuit package comprises a cavity for housing an integrated circuit (IC) and an antenna provided as part of the package that is located substantially outside the cavity. The antenna may be located on the floor of the IC package that lies in the region outside of the IC cavity. Alternatively, the antenna may be located on the upper or lower surface of the lid sealing the IC package. The antenna may be placed in the floor or on a surface of the IC lid by forming depressions in the floor or lid surface and depositing conductive material in the depressions. The conductive material deposition may be by sputtering, evaporation, or other known physical or chemical deposition method. Antennas formed in the upper surface of an IC lid may be coupled to a pin of the IC package so that the antenna may be electrically coupled to a transceiver component on the IC within the package. Antennas formed in the lower surface of an IC lid or the floor of the IC package may be coupled by a conductive pin to a component pad of the IC within the package. To reduce electromagnetic noise that may be induced by the radio frequency signals emitted or received by an antenna, a grounding plane ma…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.