Temperature-dependent refresh cycle for DRAM
US6850448B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 11, 2003 |
| Grant date | Feb 1, 2005 |
| Priority date | — |
| Expiry date | Apr 4, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/0231
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A circuit for generating a refresh signal for a memory cell, includes a temperature-independent current source, a temperature-independent voltage source, and a temperature-dependent reference voltage source. A capacitor's first and second terminals are connected respectively to the temperature-independent current source, and the temperature-independent voltage source. The capacitor's first terminal is connected to a first input terminal of a comparator. The comparator's second input is connected to the temperature-dependent reference voltage source. The comparator is configured to output a refresh signal in response to a difference between voltages present at the first and second inputs thereof.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.