Multi-tiered lithographic template and method of formation and use
US6852454B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 18, 2002 |
| Grant date | Feb 8, 2005 |
| Priority date | — |
| Expiry date | Feb 7, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F7/0035
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
This invention relates to semiconductor devices, microelectronic devices, microelectromechanical devices, microfluidic devices, photonic devices, and more particularly to a multi-tiered lithographic template, a method of forming the multi-tiered lithographic template and a method for forming devices with the multi-tiered lithographic template. The multi-tiered lithographic template (10/10′) is formed having a first relief structure and a second relief structure, thereby defining a multi-tiered relief image. The template is used in the fabrication of a semiconductor device (40) for affecting a pattern in device (40) by positioning the template in close proximity to semiconductor device (40) having a radiation sensitive material formed thereon and applying a pressure to cause the radiation sensitive material to flow into the multi-tiered relief image present on the template. Radiation is then applied through the multi-tiered template so as to further cure portions of the radiation sensitive material and further define the pattern in the radiation sensitive material. The multi-tiered template is then removed to complete fabrication of semiconductor device (40).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.