Semiconductor memory device having over-driving scheme
US6853593B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 15, 2003 |
| Grant date | Feb 8, 2005 |
| Priority date | — |
| Expiry date | Dec 15, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/065
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device has an over-driving scheme through which it is possible to perform effective over-driving regardless of the fluctuation of manufacturing and driving environment. The semiconductor memory device includes a first power supplying block for providing a normal voltage, a first driving block for driving a power line of a bit-line amplifier with a voltage on a connection node attached to the first power supplying block, a second driving block for driving the connection node with a voltage higher than the normal voltage, and a control block for generating an over-driving control signal which controls the second driving block by detecting a level of the voltage on the connection node to that of a preset reference voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.