Using linked list for caches with variable length data
US6854033B2 · kind B2 · utility
8Cited by
6References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 29, 2001 |
| Grant date | Feb 8, 2005 |
| Priority date | — |
| Expiry date | Aug 16, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0886
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In general, the cache structure overcomes the deficiency of wasted tag space and reduces associativity. The method provides for storing a single tag along with a pointer to the actual data which is stored in a separate array which includes several lines. Each data block may have a variable length and occupy several lines. These lines are linked together to form a linked list. An invalidation mechanism allows invalidation of lines of the same data block, increasing data efficiency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.