Avi Mendelson
22Patents
7h-index
54Co-inventors
72Inventor score
Filing activity: Sep 25, 1997 → Jan 17, 2018
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5996060A | System and method for concurrent processing | Physics | 34 | Expired |
| US8531471B2 | Shared virtual memory | Physics | 28 | Active |
| US6473777B1 | Method for accelerating java virtual machine bytecode verification, just-in-time compilation and garbage collection by using a dedicated co-processor | Emerging Cross-Sectional Technologies | 17 | Expired |
| US7899943B2 | PCI express enhancements and extensions | Emerging Cross-Sectional Technologies | 15 | Active |
| US8397241B2 | Language level support for shared virtual memory | Physics | 13 | Active |
| US7141953B2 | Methods and apparatus for optimal voltage and frequency control of thermally limited systems | Emerging Cross-Sectional Technologies | 11 | Expired |
| US6854033B2 | Using linked list for caches with variable length data | Physics | 8 | Expired |
| US7586281B2 | Methods and apparatus for optimal voltage and frequency control of thermally limited systems | Emerging Cross-Sectional Technologies | 5 | Active |
| US9032103B2 | Transaction re-ordering | Emerging Cross-Sectional Technologies | 5 | Active |
| US9003421B2 | Acceleration threads on idle OS-visible thread execution units | Physics | 4 | Active |
| US8683487B2 | Language level support for shared virtual memory | Physics | 4 | Active |
| US9400702B2 | Shared virtual memory | Physics | 4 | Active |
| US9026682B2 | Prefectching in PCI express | Emerging Cross-Sectional Technologies | 4 | Active |
| US10185566B2 | Migrating tasks between asymmetric computing elements of a multi-core processor | Emerging Cross-Sectional Technologies | 3 | Active |
| US9098415B2 | PCI express transaction descriptor | Emerging Cross-Sectional Technologies | 3 | Active |
| US8997114B2 | Language level support for shared virtual memory | Physics | 2 | Active |
| US7558946B2 | Breaking a lock situation in a processor without detection of the lock situation using a multi-level approach | Physics | 1 | Expired |
| US9535838B2 | Atomic operations in PCI express | Emerging Cross-Sectional Technologies | 1 | Active |
| US9442855B2 | Transaction layer packet formatting | Physics | 1 | Active |
| US9588826B2 | Shared virtual memory | Physics | 0 | Active |
| US11614959B2 | Coherence protocol for hardware transactional memory in shared memory using non volatile memory with log and no lock | Physics | 0 | Active |
| US8806068B2 | Transaction re-ordering | General | 0 | Revoked |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.