Integrating multiple thin film resistors
US6855585B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 31, 2001 |
| Grant date | Feb 15, 2005 |
| Priority date | — |
| Expiry date | Sep 14, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/85
Abstract
A method for forming multiple resistors on a substrate. The method initially includes providing a first resistor on the substrate. A first dielectric layer is deposited, patterned, and selectively etched over the first resistor. Second resistor material is provided over the first dielectric layer. Furthermore, landing pad material is provided over the second resistor material. The landing pad material and the second resistor material are then selectively etched. The selective etching forms contacts for the first resistor in a first region, and forms a second resistor and associated contacts in a second region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.