Method of forming an integrated circuit substrate
US6858475B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 30, 2003 |
| Grant date | Feb 22, 2005 |
| Priority date | — |
| Expiry date | Jun 30, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/1572
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method of forming an integrated circuit substrate that may be adapted to be attached to one or more electronic components. The method includes applying a resist to a back side of a substrate which includes patterned conductive layers on a front side and a back side of the substrate. The method further includes removing part of the patterned conductive layer from the front side of the substrate to form pads and interconnects on the front side of the substrate and applying another resist to the front side of the substrate. The method also includes forming a pattern in each resist that exposes the pads on the front and back sides of the substrate and applying electrolytic nickel to the pads on the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.