Inventor · Gilbert, AZ, US

Charan Gurumurthy

32Patents
8h-index
44Co-inventors
71Inventor score

Filing activity: Mar 31, 2003 → Apr 25, 2017

Most-cited inventions

PatentTitleAreaCited byStatus
US7402515B2 Method of forming through-silicon vias with stress buffer collars and resulting devices Electricity 332 Expired
US7749900B2 Method and core materials for semiconductor packaging Electricity 22 Active
US7042077B2 Integrated circuit package with low modulus layer and capacitor/interposer Electricity 19 Expired
US8115307B2 Embedding device in substrate cavity Electricity 14 Active
US8440916B2 Method of forming a substrate core structure using microvia laser drilling and conductive layer pre-patterning and substrate core structure formed according to the method Emerging Cross-Sectional Technologies 11 Active
US6858475B2 Method of forming an integrated circuit substrate Electricity 9 Expired
US7956713B2 Forming a helical inductor Electricity 9 Active
US7888784B2 Substrate package with through holes for high speed I/O flex cable Emerging Cross-Sectional Technologies 8 Active
US7592202B2 Embedding device in substrate cavity Electricity 7 Active
US7583871B1 Substrates for optical die structures Physics 7 Active
US7670951B2 Grid array connection device and method Electricity 5 Expired
US7915060B2 Grid array connection device and method Electricity 4 Active
US7998857B2 Integrated circuit and process for fabricating thereof Electricity 4 Active
US10306760B2 Method of forming a substrate core structure using microvia laser drilling and conductive layer pre-patterning and substrate core structure formed according to the method Emerging Cross-Sectional Technologies 4 Active
US8353101B2 Method of making substrate package with through holes for high speed I/O flex cable Emerging Cross-Sectional Technologies 3 Active
US7013562B2 Method of using micro-contact imprinted features for formation of electrical interconnects for substrates Emerging Cross-Sectional Technologies 3 Expired
US9554468B2 Panel with releasable core Emerging Cross-Sectional Technologies 2 Active
US7666714B2 Assembly of thin die coreless package Electricity 2 Active
US7517788B2 System, apparatus, and method for advanced solder bumping Electricity 2 Active
US7985622B2 Method of forming collapse chip connection bumps on a semiconductor substrate Electricity 2 Active
US9554472B2 Panel with releasable core Emerging Cross-Sectional Technologies 2 Active
US7831115B2 Optical die structures and associated package substrates Electricity 2 Active
US9648733B2 Method of forming a substrate core structure using microvia laser drilling and conductive layer pre-patterning and substrate core structure formed according to the method Emerging Cross-Sectional Technologies 2 Active
US8395051B2 Doping of lead-free solder alloys and structures formed thereby Electricity 2 Active
US9698114B2 Grid array connection device and method Electricity 1 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.