Patent · US Expired

Circuit configuration having a field-effect transistor operable at higher frequencies

US6858895B2 · kind B2 · utility

11Cited by
3References
8Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 17, 2003
Grant dateFeb 22, 2005
Priority date
Expiry dateMar 17, 2023

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D64/516
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A circuit configuration for the switch-on/off control of a DMOS power transistor has at least one first gate electrode and, separate from the latter, a second gate electrode, which are capacitively coupled to one another by a capacitance distributed over the field-effect transistor and which can be driven via separate external gate electrode terminals. The circuit configuration has two individual driver circuits and a generating circuit in order to feed a first drive signal to the first gate electrode and a second drive signal to the second gate electrode, the second drive signal being delayed with respect to the first drive signal.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.