Method for creating thick oxide on the bottom surface of a trench structure in silicon

US6861296B2 · kind B2 · utility

Assignee

• FAIRCHILD SEMICONDUCTOR CORPORATION · US

Inventors

• Henry W. Hurst · Orem, US
• James J. Murphy · South Jordan, US

Key dates

• Filing date: Jun 19, 2002
• Grant date: Mar 1, 2005
• Expiry date: Jun 19, 2022

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/516

Abstract

A gate isolation structure of a semiconductor device and method of making the same provides a trench in a silicon substrate, wherein a dielectric layer is formed on sidewalls and bottom of the trench, the dielectric layer having a first thickness on the sidewalls and a second thickness at the bottom that is greater than the first thickness. The thicker dielectric layer at the bottom substantially reduces gate charge to reduce the Miller Capacitance effect, thereby increasing the efficiency of the semiconductor device and prolonging its life.