Flip-chip die and flip-chip package substrate
US6861740B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 26, 2004 |
| Grant date | Mar 1, 2005 |
| Priority date | — |
| Expiry date | Apr 26, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K1/112
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A flip-chip die and a flip-chip package substrate. The flip-chip die has an active surface containing a plurality of core power/ground pads, at least one signal pad rings, at least one power pad rings and at least one ground pad rings. The core power/ground pads are located in the central region of the die while the die pad rings are arranged concentrically just outside the central power/ground pad occupied region. The uppermost layer of the flip-chip package substrate has a plurality of bump pads that correspond to the die pads on the die. Non-signal bump pad rings may also form outside the signal bump pad ring. Pairs of power trace or ground trace may also form on the sides of a signal trace in any one of the wiring layers within the flip-chip package substrate to serve as guard traces for the signal trace.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.