Non-volatile memory cell with gated diode and MOS transistor and method for using such cell
US6862216B1 · kind B1 · utility
13Cited by
5References
31Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 29, 2004 |
| Grant date | Mar 1, 2005 |
| Priority date | — |
| Expiry date | Jun 29, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/681
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile memory cell including a gated diode and a single readout transistor, methods for programming and reading out such a cell, and a memory including an array of such cells. The readout transistor is an MOS transistor. The transistor and gated diode are formed in a volume of semiconductor material of one type, and share a source region, a control gate, and a floating gate. The transistor has a drain region formed of semiconductor material of one type and the diode has a drain region formed of semiconductor material of the opposite type.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.