MIM capacitor with diffusion barrier
US6864137B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 15, 2003 |
| Grant date | Mar 8, 2005 |
| Priority date | — |
| Expiry date | Jul 15, 2023 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/957
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process of manufacturing a semiconductor device. The initial process steps are forming a first insulating film above a semiconductor substrate and removing a selected portion of the first insulating film to form an opening. The next step is depositing a first electrode, a dielectric film and a second electrode successively on a bottom portion of the opening, The deposits being oriented such that they are in substantially parallel relationship with a surface of the semiconductor substrate. The final steps are removing selected portions of the first electrode, the dielectric film and the second electrode, forming a capacitor at a selected position in the opening, forming a second insulating film at least in the opening, and forming a third insulating film on the second insulating film.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.