Large line conductive pads for interconnection of stackable circuitry
US6864576B2 · kind B2 · utility
0Cited by
9References
10Claims
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Assignee
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Key dates
| Filing date | Oct 30, 2003 |
| Grant date | Mar 8, 2005 |
| Priority date | — |
| Expiry date | Oct 30, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/0108
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Digital circuitry, such as interconnective pads which are patterned as waffles according to the embossing methods for flexible substrates which are disclosed, so as to be especially suited for the interconnection of stacks of circuitry blocks forming digital memory known as Permanent Inexpensive, Rugged Memory (PIRM) cross point arrays.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.