Patent · US Expired

Clocked integrated semiconductor circuit and method for operating such a circuit

US6864730B2 · kind B2 · utility

1Cited by

2References

10Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Robert Reiner · Neubiberg, DE
Holger Sedlak · Hersbruck, DE

Key dates

Filing date	Jan 29, 2001
Grant date	Mar 8, 2005
Priority date	—
Expiry date	Jun 21, 2023

Classification

Technology area (CPC G)Physics
CPC primaryG06F21/755
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

An integrated semiconductor circuit having a number of circuit units which are driven by a clock signal and can be operated both in parallel and in series is provided. A connection supplying the clock signal is connected to the clock input of the respective circuit units via respective controllable switching devices. The control inputs of the switching devices are connected to an output of a random signal generator, so that a circuit unit is operated in parallel or in series with one or more of the other circuit units on the basis of the random signal. A method of operating an integrated semiconductor circuit is also provided.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.