Patent · US Expired

Multitasking processor system for monitoring interrupt events

US6865636B1 · kind B1 · utility

20Cited by

5References

8Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Peter Hober · Riemerling, DE
Christian Jenkner · Friesach, AT
Xiaoning Nie · Birkenfeld, DE

Key dates

Filing date	Nov 10, 2000
Grant date	Mar 8, 2005
Priority date	—
Expiry date	Jun 15, 2021

Classification

Technology area (CPC G)Physics
CPC primaryG06F9/3851
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

In a processor system, different memory means (8), which can in each case comprise a memory stack (9) for the instruction counter, a register (10) for temporarily storing data and status register (11), are provided for various tasks. When an interrupt event (EV) occurs which causes a change from a current task to a new task, a controller (21) switches from the memory means (8) allocated to the old task to the memory means (8) allocated to the new task.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.