Method of designing semiconductor integrated circuit device and semiconductor integrated circuit device manufactured using the same
US6867465B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 16, 2003 |
| Grant date | Mar 15, 2005 |
| Priority date | — |
| Expiry date | Jul 27, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/39
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a semiconductor integrated circuit device with a transistor, there are a single diffusion layer and a gate base electrode provided outside of the diffusion layer to extend in a pitch direction. N (N is an odd positive integer) gate electrodes are provided above the diffusion layer in parallel in the pitch direction to extend from the gate base electrode in a height direction orthogonal to the pitch direction to pass through the diffusion layer. Source nodes are provided on the diffusion layer along one of the N gate electrodes on a side outside the N gate electrodes in a direction opposing to the pitch direction as a head gate electrode. Drain nodes are provided on the diffusion layer along another of the N gate electrodes on a side outside the N gate electrodes in the pitch direction as a last gate electrode. The drain nodes are less than the source nodes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.