Chiaki Dono
52Patents
9h-index
28Co-inventors
78Inventor score
Filing activity: May 30, 2001 → Dec 16, 2020
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7551502B2 | Semiconductor device | Physics | 75 | Active |
| US9412432B2 | Semiconductor storage device and system provided with same | Physics | 69 | Active |
| US6967878B2 | Redundancy architecture for repairing semiconductor memories | Physics | 53 | Expired |
| US10373657B2 | Semiconductor layered device with data bus | Emerging Cross-Sectional Technologies | 39 | Active |
| US6538924B2 | Semiconductor integrated circuit | Physics | 39 | Expired |
| US7742356B2 | Semiconductor memory device having a refresh cycle changing circuit | Physics | 21 | Active |
| US6667905B2 | Semiconductor integrated circuit | Physics | 14 | Expired |
| US6867465B2 | Method of designing semiconductor integrated circuit device and semiconductor integrated circuit device manufactured using the same | Physics | 9 | Expired |
| US10365325B2 | Semiconductor memory device | Physics | 9 | Active |
| US7301844B2 | Semiconductor device | Physics | 8 | Active |
| US10008287B2 | Shared error detection and correction memory | Physics | 8 | Active |
| US6765815B2 | Semiconductor memory device having a main word-line layer disposed above a column selection line layer | Electricity | 7 | Expired |
| US8862811B2 | Semiconductor device performing burst order control and data bus inversion | Physics | 7 | Active |
| US7215589B2 | Semiconductor memory device that requires refresh operations | Physics | 6 | Expired |
| US7457176B2 | Semiconductor memory and memory module | Physics | 6 | Active |
| US6845043B2 | Method of verifying a semiconductor integrated circuit apparatus, which can sufficiently evaluate a reliability of a non-destructive fuse module after it is assembled | Physics | 6 | Expired |
| US7719906B2 | Semiconductor device | Physics | 6 | Active |
| US7075852B2 | Semiconductor memory device of hierarchy word type and sub word driver circuit | Physics | 5 | Expired |
| US9983925B2 | Apparatuses and methods for fixing a logic level of an internal signal line | Physics | 5 | Active |
| US8254153B2 | Semiconductor memory device having pad electrodes arranged in plural rows | Physics | 4 | Active |
| US8867301B2 | Semiconductor device having latency counter to control output timing of data and data processing system including the same | Physics | 4 | Active |
| US7697360B2 | Semiconductor device | Physics | 4 | Active |
| US7085187B2 | Semiconductor storage device | Physics | 4 | Expired |
| US10163469B2 | System and method for write data bus control in a stacked memory device | Physics | 4 | Active |
| US10262704B1 | Apparatuses and methods for providing multiphase clock signals | Electricity | 4 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.