Trench flash memory device and method of fabricating thereof
US6870212B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 7, 2002 |
| Grant date | Mar 22, 2005 |
| Priority date | — |
| Expiry date | Feb 5, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/035
Abstract
A method of fabricating a trench flash memory device, where the method includes forming a patterned mask layer on the substrate and using it as the mask for form a trench in the substrate. Next, a source region is formed in the substrate near the bottom of the trench, followed by forming a tunnel oxide layer, a floating gate, a gate dielectric layer and a control in the trench. After removing the mask layer to expose the substrate, a drain region is further formed in the substrate. In this invention, since the trench flash memory device has a cylindrical shape with the tunnel oxide layer, the floating gate and the gate dielectric layer wrapping around the control gate, the overlap area between the floating gate and the control gate is increased, resulting in a higher gate coupling rate (GCR), a lower required operation voltage and a higher device operation speed and efficiency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.