Field effect transistor and method of manufacturing same
US6870219B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 31, 2002 |
| Grant date | Mar 22, 2005 |
| Priority date | — |
| Expiry date | Jul 31, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/603
Abstract
A field effect transistor includes a drain region (12) having a first portion (18) and a second portion (20), with the second portion being more lightly doped than the first portion. A channel region (14) is adjacent to the second portion and a drain electrode (24) overlies the drain region. A gate electrode (16) overlies the channel region. A shield structure (30) overlies the drain region and has a first section (32) at a first distance (33) from a semiconductor substrate (10) and a second section (34) at a second distance (35) from the semiconductor substrate, the second distance being greater than the first distance. In a particular embodiment the FET includes a shield structure wherein the first and second sections are physically separate. The location of these shield sections may be varied within the FET, and the potential of each section may be independently controlled.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.