SSTL pull-up pre-driver design using regulated power supply
US6873503B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 19, 2002 |
| Grant date | Mar 29, 2005 |
| Priority date | — |
| Expiry date | Oct 25, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/00315
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A SSTL memory interface pre-driver stage that uses a voltage regulator to generate a ‘virtual’ ground reference voltage is provided. The ‘virtual’ ground voltage reference, being greater than a zero volt ground voltage, allows low voltage transistors to be used, thereby improving interface performance and decreasing system power consumption. The pre-driver stage uses a biasing circuit to bias the voltage regulator, formed by a transistor arranged in a source follower configuration, to generate the ‘virtual’ ground reference voltage off which a voltage translator stage of the pre-driver stage operates to generate an output of the pre-driver stage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.