Semiconductor memory device for reducing noise in operation of sense amplifier
US6876584B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 18, 2003 |
| Grant date | Apr 5, 2005 |
| Priority date | — |
| Expiry date | Jul 18, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/065
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention provides a semiconductor memory device for reducing operation noise, as a sense amplifier in accordance with the present invention senses and amplifies a supplied data signal of a bit line pair on high speed. For this object, the semiconductor memory device includes a first cell array including a plurality of unit cells to be selected by an address signal; a sense amplifying unit for sensing and amplifying voltage level of a bit line connected to the plurality of the unit cells; a switching unit for connecting or disconnecting the sense amplifying unit to the bit line; and a sense amplifying connection unit for controlling the switching unit for connecting or disconnecting the sense amplifying unit to the first cell array by increasing or decreasing an amount of current throughout the switching unit in response to the address signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.