Multiple memory aliasing for a configurable system-on-chip
US6877063B1 · kind B1 · utility
20Cited by
13References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 22, 2000 |
| Grant date | Apr 5, 2005 |
| Priority date | — |
| Expiry date | Nov 14, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0638
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for multiple memory aliasing for a configurable system-on-a-chip, including executing code from an internal memory, locating a configuration program in the internal memory, disabling the internal memory alias, and jumping to a secondary initialization routine, is disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.