Testing method and testing device for semiconductor integrated circuits
US6879174B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 30, 2001 |
| Grant date | Apr 12, 2005 |
| Priority date | — |
| Expiry date | Dec 11, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/2841
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
The set values of the base power supply voltages are divided between 10 [V] and 0 [V], the upper limit value and the lower limit value of the drive voltage specification of a liquid crystal driver. A base power supply potential difference of 10 [V] between V1 to V2 of the base power supply terminals can be generated. By taking the gradation levels included between V1 to V2 of these base power supply terminals as test objects, each of the neighboring gradation output levels can mutually have a potential difference of about 200 [mV] (base power supply potential difference between the terminals 10000 [mV]/51 gradation levels). For the gradation levels included between these base power supply terminals, for every gradation level, test is performed while changing sequentially the input data and the setting of the judgment level of the comparator, and the gradation levels included in this interval are all tested.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.