Methods and system for processing a microelectronic topography
US6881437B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 16, 2003 |
| Grant date | Apr 19, 2005 |
| Priority date | — |
| Expiry date | Jun 16, 2023 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P80/30
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods and systems are provided which are adapted to process a microelectronic topography, particularly in association with an electroless deposition process. In general, the methods may include loading the topography into a chamber, closing the chamber to form an enclosed area, and supplying fluids to the enclosed area. In some embodiments, the fluids may fill the enclosed area. In addition or alternatively, a second enclosed area may be formed about the topography. As such, the provided system may be adapted to form different enclosed areas about a substrate holder. In some cases, the method may include agitating a solution to minimize the accumulation of bubbles upon a wafer during an electroless deposition process. As such, the system provided herein may include a means for agitating a solution in some embodiments. Such a means for agitation may be distinct from the inlet/s used to supply the solution to the chamber.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.