Method of fabricating CMOS inverter and integrated circuits utilizing strained surface channel MOSFETS

US6881632B2 · kind B2 · utility

Assignee

• AMBERWAVE SYSTEMS CORPORATION · US

Inventors

• Eugene A. Fitzgerald · Windham, US
• Nicole Gerrish · Cambridge, US

Key dates

• Filing date: Jul 1, 2003
• Grant date: Apr 19, 2005
• Expiry date: Jul 1, 2023

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/751

Abstract

A method of fabricating a CMOS inverter including providing a heterostructure having a Si substrate, a relaxed Si1-xGex layer on the Si substrate, and a strained surface layer on said relaxed Si1-xGex layer; and integrating a pMOSFET and an nMOSFET in said heterostructure, wherein the channel of said pMOSFET and the channel of the nMOSFET are formed in the strained surface layer. Another embodiment provides a method of fabricating an integrated circuit including providing a heterostructure having a Si substrate, a relaxed Si1-xGex layer on the Si substrate, and a strained layer on the relaxed Si1-xGex layer; and forming a p transistor and an n transistor in the heterostructure, wherein the strained layer comprises the channel of the n transistor and the p transistor, and the n transistor and the p transistor are interconnected in a CMOS circuit.