Multi-chip module and method for forming and method for deplating defective capacitors
US6882045B2 · kind B2 · utility
Inventors
Key dates
| Filing date | Nov 29, 2001 |
| Grant date | Apr 19, 2005 |
| Priority date | — |
| Expiry date | Jul 2, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/1383
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method for deplating defective capacitors comprising forming a plurality of capacitors on a semiconductor substrate, forming a plurality of metal contacts on the plurality of capacitors, and depositing a layer of photoresist on the semiconductor substrate. The photoresist layer is patterned so that the plurality of metal contacts are exposed, which are then contacted with an electrically conductive solution. The metal contacts, which are disposed over defective capacitors, are subsequently deplated. A method for forming a multi-chip module comprising forming a thin-film polymeric interconnect structure having a pair of sides, one of which is disposed on a silicon substrate having active or passive devices and the other of which has a computer chip mounted thereon. A multi-chip module formed by the method.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.