Specifying method for Cu contamination processes and detecting method for Cu contamination during reclamation of silicon wafers, and reclamation method of silicon wafers
US6884634B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Sep 27, 2002 |
| Grant date | Apr 26, 2005 |
| Priority date | — |
| Expiry date | Jun 23, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L22/34
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of specifying a Cu-contamination-causative step or steps in a Si wafer reclamation process including plural steps in combination, comprising: using p-type Si wafers, or p-type Si wafers and n-type Si wafers as monitor wafers, and performing a measuring operation for measuring the electrical resistance of the monitor wafers at least once before and after a single step or a series of successive steps during the Si wafer reclamation process. The present invention is capable of nondestructively, simply, and accurately detecting Cu that can contaminate Si wafers during a Si wafer reclamation process and is capable of specifying a Cu-contamination-causative process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.