Manufacturing of a low-noise mos device
US6884703B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 13, 2004 |
| Grant date | Apr 26, 2005 |
| Priority date | — |
| Expiry date | Jan 13, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/28211
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
At the surface of a substrate a gate oxide layer is produced and is given a dual thickness. A first oxide layer is produced over the surface of a substrate by thermal oxidation and is covered by a mask layer defining suitably located openings. A material accelerating or retarding the oxidation of the substrate is ion implanted through the first oxide layer in the openings, after which the mask is removed and the thermal oxidation is continued over the now exposed total surface of the first oxide layer. The material used for ion implanting can be an oxidation rate promoting material such as chloride and bromine. The manufacturing method is simple and adds little to presently used process flows for fabricating MOS devices. The dual thickness of the gate oxide gives the manufactured MOS device a low level of total noise generated when using the device for instance in RF-circuits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.