Semiconductor device and a memory system including a plurality of IC chips in a common package
US6885092B1 · kind B1 · utility
15Cited by
10References
4Claims
0Family size
Assignees
Inventors
Key dates
| Filing date | Dec 2, 1999 |
| Grant date | Apr 26, 2005 |
| Priority date | — |
| Expiry date | Dec 2, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device is formed by laminating two semiconductor chips with the rear surfaces thereof provided face to face. Each semiconductor chip is provided with an outer lead for clock enable to which the clock enable signal and chip select signal are individually input. On the occasion of making access to one semiconductor chip, the other semiconductor chip is set to the low power consumption mode by setting the clock enable signal and chip select signal to the non-active condition.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.