Power-up signal generator for semiconductor memory devices
US6885605B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 26, 2002 |
| Grant date | Apr 26, 2005 |
| Priority date | — |
| Expiry date | Jan 23, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/2227
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A power-up signal generator uses a deep power down power-up signal, which should be in a standby state in a deep power down entry, for an initialization of other semiconductor elements in a DRAM device that operates after an internal power supply voltage is generated. The generator also uses the power-up signal, which is disabled in the deep power down entry and enabled in a deep power down exit by the internal power supply voltage. The generator may include a power-up detector for generating a power-up detection signal, a deep power down power-up signal generator for generating a deep power down power-up signal, a power-up signal generator for generating a power-up signal and a power-up controller for determining whether or not to enable the power-up signal in the deep power down entry.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.