Method and apparatus for providing clock/buffer network in mask-programmable logic device
US6886143B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 29, 2002 |
| Grant date | Apr 26, 2005 |
| Priority date | — |
| Expiry date | Mar 29, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/39
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A mask-programmable logic device includes a “dedicated” device-wide distribution network for device-wide signals such as clocks. Distribution networks for secondary clocks and similar signals, as well as for other high-fanout signals, are designed on a custom basis for each user configuration to be implemented by mask programming, using design techniques that are well known in application-specific integrated circuit design. This accomplishes, at the same time, elimination of the need to custom design the device-wide distribution network for each user configuration, preservation of the timing characteristics of a comparable conventional programmable logic device on which the user configuration may be based, reduction of die-size and power requirements as compared to the comparable conventional programmable logic device, and reduction of the average design time necessary to implement a given user configuration.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.