Signal processing circuit
US6889274B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 1, 2001 |
| Grant date | May 3, 2005 |
| Priority date | — |
| Expiry date | Dec 26, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N19/61
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A signal processing circuit having a data input-output (I/O) circuit, a microprocessor, a dedicated processing circuit, a local memory, and a memory access control circuit interconnected over a bus. The system bus connects to the data I/O circuit, microprocessor, dedicated processing circuit, and memory access control circuit. A local memory bus connects to the local memory. First, second, and third connection circuits connect between the system bus and local memory bus, between a first local bus in the dedicated processing circuit and the local memory bus, and between a second local bus in the data I/O circuit and the local memory bus. The memory access control circuit controls the first, second, and third connection circuits according to priorities assigned for the connection circuits and determines which of the second local bus, first local bus, and system bus will be connected to the local memory bus.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.