Method and apparatus for determining critical timing path sensitivities of macros in a semiconductor device
US6889369B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 26, 2001 |
| Grant date | May 3, 2005 |
| Priority date | — |
| Expiry date | Jan 15, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31704
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method for determining critical timing path sensitivities of macros in a semiconductor device includes configuring a timing parameter of a particular macro in the semiconductor device; determining a first maximum operating frequency of the semiconductor device configured in accordance with the timing parameter; changing the timing parameter of the particular macro; determining a second maximum operating frequency of the semiconductor device configured in accordance with the changed timing parameter; and determining a contribution of the selected macro to a critical timing path of the semiconductor device based on the first and second maximum operating frequencies. A system for testing a semiconductor device having a plurality of macros includes a tester and a controller. The tester is adapted to configure a timing parameter of a particular macro in the semiconductor device, determine a first maximum operating frequency of the semiconductor device configured in accordance with the timing parameter, change the timing parameter of the particular macro, and determine a second maximum operating frequency of the semiconductor device configured in accordance with the changed timing para…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.