Method for etching and/or patterning a silicon-containing layer

US6890860B1 · kind B1 · utility

Assignee

• Cypress Semiconductor Corporation · US

Inventors

• Tinghao Wang · Eden Prairie, US
• Usha Raghuram · Saratoga, US
• James E. Nulty · San Jose, US

Key dates

• Filing date: Jun 30, 1999
• Grant date: May 10, 2005
• Expiry date: Apr 1, 2021

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/32139
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Prior to etching a poly-II layer during fabrication of an integrated circuit, a hydrofluoric acid (HF) dip is used to remove surface oxides from the poly-silicon layer and an anisotropic descumming operation is used to remove any resist material left over from a patterning operation. Following patterning, a long breakthrough etch (e.g., sufficient to remove 300-1500 Å of oxide) using an anisotropic breakthrough etchant (e.g., a fluorocarbon-based etchant) is performed before the poly-silicon layer is etched. The HF dip may be repeated if a predetermined time between the first dip and the etch is exceeded. The anisotropic descumming operation may be performed using an anisotropic anti-reflective coating (ARC) etch, e.g., a Cl2/O2, HBr/O2, CF4/O2 or another etch having an etch rate of approximately 3000 Å/min for approximately 10-20 seconds. The poly-silicon layer may be annealed following (but not prior to) the etch thereof.