Stability in thyristor-based memory device
US6891205B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 19, 2003 |
| Grant date | May 10, 2005 |
| Priority date | — |
| Expiry date | Jan 18, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D18/251
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor device having a thyristor-based memory device exhibits improved stability under adverse operating conditions related to temperature, noise, electrical disturbances and light. In one particular example embodiment of the present invention, a semiconductor device includes a thyristor-based memory device that uses a shunt that effects a leakage current in the thyristor. The thyristor includes a capacitively-coupled control port and anode and cathode end portions. Each of the end portions has an emitter region and an adjacent base region. In one implementation, the current shunt is located between the emitter and base region of one of the end portions of the thyristor and is configured and arranged to shunt low-level current therebetween. In connection with an example embodiment, it has been discovered that shunting current in this manner improves the ability of the device to operate under adverse conditions that would, absent the shunt, result in inadvertent turn on, while keeping the standby current of the memory device to an acceptably low level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.