Integrated circuit package substrate with high density routing mechanism
US6891260B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 6, 2002 |
| Grant date | May 10, 2005 |
| Priority date | — |
| Expiry date | Feb 27, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor substrate having high density signal routing is provided. The semiconductor substrate may include first signal traces electrically connected to a first row of signal bonding pads and routed on a first layer of the substrate. In addition, the substrate may include second signal traces electrically connected to a second row of signal bonding pads and routed on a second layer of the substrate. The first layer may be arranged in a strip line configuration, and the second layer may be arranged in a micro strip line configuration. Alternatively, the second signal traces may be arranged in a strip line configuration. In an embodiment, the first and second signal traces may be routed as differential pairs with approximately equal trace lengths. In another embodiment, all of the first and second signal traces may be routed as differential pairs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.