Array substrate of liquid crystal display device
US6894735B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 27, 2002 |
| Grant date | May 17, 2005 |
| Priority date | — |
| Expiry date | Jun 27, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F1/136227
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
An array substrate of a liquid crystal display device, wherein picture quality is improved without decreasing aperture ratio by providing a storage capacitor of a large capacity. The array substrate of a liquid crystal display device includes a gate line formed on an array substrate and a gate electrode diverged from the gate line. A common line composed of substantially the same material as the gate line of an opaque metal is arranged parallel to the gate line. A first electrode of a storage capacitor composed of a transparent conductive material is formed on the common line. A gate insulating film covers the gate line, the gate electrode, and the first electrode of a storage capacitor. A semiconductor layer is formed to overlap the gate electrode on the gate insulating film. A source electrode and a drain electrode are arranged with a constant interval on the semiconductor layer. A data line is connected to the source electrode and is arranged perpendicularly to the gate line. An insulating layer is formed on the data line, the source/drain electrodes, and the gate insulating film. A first contact hole is formed by removing the insulating layer so as to expose a part of the drain…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.