Lateral operation bipolar transistor and a corresponding fabrication process
US6897545B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 9, 2002 |
| Grant date | May 24, 2005 |
| Priority date | — |
| Expiry date | Jun 15, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/184
Abstract
The transistor includes an emitter region 17 disposed in a first isolating well 11, 150 formed in a semiconductor bulk. An extrinsic collector region 16 is disposed in a second isolating well 3, 150 formed in the semiconductor bulk SB and separated laterally from the first well by a bulk separator area 20. An intrinsic collector region is situated in the bulk separator area 20 in contact with the extrinsic collector region. An intrinsic base region 100 is formed which is thinner laterally than vertically and in contact with the intrinsic collector region and in contact with the emitter region through bearing on a vertical flank of the first isolating well facing a vertical flank of the second isolating well. An extrinsic base region 60 is formed which is substantially perpendicular to the intrinsic base region in the top part of the bulk separator area, and contact terminals C, B, E respectively in contact with the extrinsic collector region, the extrinsic base region, and the emitter region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.