Inventor · Meylan, FR

Herve Jaouen

19Patents
6h-index
11Co-inventors
63Inventor score

Filing activity: Jun 26, 1998 → Feb 9, 2018

Most-cited inventions

PatentTitleAreaCited byStatus
US6031445A Transformer for integrated circuits Emerging Cross-Sectional Technologies 176 Expired
US6081030A Semiconductor device having separated exchange means Electricity 17 Expired
US6100595A Semiconductor device having optoelectronic remote signal-exchange means Electricity 10 Expired
US6673703B2 Method of fabricating an integrated circuit Electricity 9 Expired
US6897545B2 Lateral operation bipolar transistor and a corresponding fabrication process Electricity 8 Expired
US6670686B2 Integrated sound transmitter and receiver, and corresponding method for making same Physics 8 Expired
US6623993B2 Method of determining the time for polishing the surface of an integrated circuit wafer Electricity 3 Expired
US6756279B2 Method for manufacturing a bipolar transistor in a CMOS integrated circuit Electricity 2 Expired
US9929039B2 Method for manufacture of a semiconductor wafer suitable for the manufacture of an SOI substrate, and SOI substrate wafer thus obtained Electricity 2 Active
US7396736B2 Magnetic sensor of very high sensitivity Emerging Cross-Sectional Technologies 1 Expired
US6208551A Memory circuit architecture Physics 1 Expired
US7038285B2 Very high sensitivity magnetic sensor Emerging Cross-Sectional Technologies 1 Expired
US6503812B2 Fabrication process for a semiconductor device with an isolated zone Electricity 1 Expired
US7029927B2 Method of repairing an integrated electronic circuit using a formed electrical isolation Electricity 0 Expired
US6593204B2 Method of fabricating a silicon-on-insulator system with thin semiconductor islets surrounded by an insulative material Electricity 0 Expired
US7029991B2 Method for making a SOI semiconductor substrate with thin active semiconductor layer Electricity 0 Expired
US6423996B1 Process for fabricating a metal-metal capacitor within an integrated circuit, and corresponding integrated circuit Electricity 0 Expired
US6800514B2 Method of fabricating a MOS transistor with a drain extension and corresponding transistor Electricity 0 Expired
US10535552B2 Method for manufacture of a semiconductor wafer suitable for the manufacture of an SOI substrate, and SOI substrate wafer thus obtained Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.