I/O architecture for integrated circuit package
US6897556B2 · kind B2 · utility
0Cited by
3References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 8, 2003 |
| Grant date | May 24, 2005 |
| Priority date | — |
| Expiry date | Sep 8, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19041
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A circuit package may include an upper surface of first conductive elements and second conductive elements. The first conductive elements may receive input/output signals from respective conductive elements of an integrated circuit die, and the second conductive elements may receive a first plurality of the input/output signals from respective ones of the first conductive elements. A lower surface of the package may include third conductive elements, the third conductive elements to receive a second plurality of the input/output signals from respective other ones of the first conductive elements.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.