Mixed LVR and HVR reticle set design for the processing of gate arrays, embedded arrays and rapid chip products
US6900075B2 · kind B2 · utility
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1References
6Claims
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Assignee
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Key dates
| Filing date | Oct 31, 2003 |
| Grant date | May 31, 2005 |
| Priority date | — |
| Expiry date | Oct 31, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F7/70433
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
An embodiment of the present invention provides a novel method which makes LVR to HVR registration possible by wrapping the X and Y scribes around each instance of each layer on both the LVR and HVR reticles; standard HVR reticles and LVR reticles will not align to one another due to registration and electrical test structures in the scribe being in different locations. Another embodiment of the present invention addresses the loss of die per wafer due to increased sribe area when using LVR and HVR reticles in the same set.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.