Context scheduling
US6901507B2 · kind B2 · utility
15Cited by
3References
23Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Nov 19, 2001 |
| Grant date | May 31, 2005 |
| Priority date | — |
| Expiry date | Jun 19, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3851
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A programmable processing system that executes multiple instruction contexts includes an instruction memory for storing instructions that are executed by the system, fetch logic for determining an address of an instruction, with the fetch logic including scheduling logic that schedules execution of the instruction contexts based on condition signals indicating an availability of a hardware resource, with the condition signals being divided into groups of condition signals, which are sampled in turn by the scheduling logic to provide a plurality of scan sets of sampled conditions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.